Jun Shiomi (塩見 準)
Introduction

Affiliation

Assistant Professor,
Integrated Circuits Design Engineering Laboratory (Prof. Hidetoshi Onodera's Lab.),
Department of Communications and Computer Engineering,
Graduate School of Informatics, Kyoto University.

Education

  • Doctor of Informatics, November 2017, Kyoto University, Kyoto, Japan.
  • Master of Informatics, March 2016, Kyoto University, Kyoto, Japan.
  • Bachelor of Electrical and Electronics Engineering, March 2014, Kyoto University, Kyoto, Japan.
  • Research Fellowship for Young Scientists, April 2016 - November 2017, Japan Society for the Promotion of Science (DC1).
Research Interests

  • Perormance modeling and computer-aided design for low power and low voltage system-on-chips
  • Low-voltage on-chip memory design for low power system-on-chips
  • Integrated optical logic circuit design using nanophotonics for ultra-high speed on-chip signal processing
Contact

Address Integrated Circuits Design Engineering Laboratory (Onodera Lab.),
Department of Communications and Computer Engineering,
Graduate School of Informatics, Kyoto University,
Yoshida honmachi, Sakyo-ku, Kyoto 606-8501, Japan.
(Go to Google Maps)
Room Faculty of Engineering Bldg. No. 3, S306
Tel +81-75-753-5312
Fax +81-75-753-5343
E-mail (Main) shiomi-jun (_a_t_) i.kyoto-u.ac.jp
(Sub) shiomi-jun (_a_t_) vlsi.kuee.kyoto-u.ac.jp


Membership

  • IEEE, IEICE, IPSJ
Academic Activity

  • 2018年 第13回ICTイノベーション 実行委員
  • 2018/04/01- Counselor, IEEE Student Branch at Kyoto University
  • 2018/04/01- VDEC協力教員
Research Assistant/Teaching Assistant

Research Assistant
  • "プロジェクト「低消費電力回路設計技術」においての,低消費電力回路の設計と特性評価に関する研究補助," 2016年,京都大学.
Teaching Assistant
  • Logic Circuits in Kyoto University, Japan, 2017.
  • Logic Circuits in Kyoto University, Japan, 2016.
  • Electrical and Electronic Engineering Advanced Practice B in Kyoto University, Japan, 2015.
  • Logic Circuits in Kyoto University, Japan, 2015.
  • Electrical and Electronic Engineering Advanced Practice B in Kyoto University, Japan, 2014.
  • Logic Circuits in Kyoto University, Japan, 2014.